@incollection{, 81AF979604FF97A5547627CBC3D8B2C8 , author={{KalpanaJain} and {NaveenChoudhary} and {College of Technology and Engineering/Maharana Pratap University of Agriculture and Technology}}, journal={{Global Journal of Computer Science and Technology}}, journal={{GJCST}}0975-41720975-435010.34257/gjcst, address={Cambridge, United States}, publisher={Global Journals Organisation}144711 } @incollection{b0, , title={{An Automated Technique for Topology and Route Generation of Application Specific On-Chip Interconnection Networks}} , author={{ KSrinivasan }} , booktitle={{Proc. ICCAD}} ICCAD , year={2005} } @incollection{b1, , title={{Analysis of power consumption on switch fabrics in network routers}} , author={{ TTYe } and { LBenini } and { GDe Micheli }} , booktitle={{Design Automation Conference}} , publisher={IEEE} , year={2002} , note={Proceedings. 39th} } @incollection{b2, , title={{High-performance routing in networks of workstations with irregular topology}} , author={{ FSilla } and { JDuato }} , journal={{IEEE Transactions Parallel and Distributed Systems}} 11 7 , year={2000} } @incollection{b3, , title={{Efficient adaptive routing in networks of workstations with irregular topology}} , author={{ FSilla } and { MPMalumbres } and { ARobles } and { PLópez } and { JDuato }} , booktitle={{Springer Berlin Heidelberg Communication and Architectural Support for Network-Based Parallel Computing}} , year={1997} } @incollection{b4, , title={{The turn model for adaptive routing}} , author={{ CJGlass } and { LMNi }} , journal={{In ACM SIGARCH Computer Architecture News}} 20 2 , year={1992} } @incollection{b5, , title={{L-turn routing: An adaptive routing in irregular networks}} , author={{ MKoibuchi } and { AFunahashi } and { AJouraku } and { HAmano }} , booktitle={{IEEE Parallel Processing InternationalConference}} , year={2001} } @incollection{b6, , title={{Networks on chips: a new SoC paradigm}} , author={{ LBenini } and { GDe Micheli }} , journal={{Computer}} 1 , year={2002} } @incollection{b7, , title={{Key research problems in NoC design: a holistic perspective}} , author={{ UYOgras } and { JHu } and { RMarculescu }} , booktitle={{Proceedings of the 3rd}} the 3rd , year={2005} } @incollection{b8, , title={{}} , journal={{IEEE/ACM/IFIP international conference on}} } @book{b9, , title={{Hardware/software codesign and system synthesis}} } @incollection{b10, , title={{Energy-aware mapping for tile-based NoC architectures under performance constraints}} , author={{ JHu } and { RMarculescu }} , booktitle={{Proceedings of the Asia and South Pacific Design Automation Conference}} the Asia and South Pacific Design Automation Conference , year={2003} } @incollection{b11, , title={{Autonet: A high-speed, self-configuring local area network using point-to-point links}} , author={{ MDSchroeder } and { ADBirrell } and { MBurrows } and { HMurray } and { RMNeedham } and { TLRodeheffer } and { CPThacker }} , booktitle={{IEEE}} , year={1991} 9 } @incollection{b12, , title={{GA based congestion aware topology generation for application specific NoC}} , author={{ NChoudhary } and { MSGaur } and { VLaxmi } and { VSingh }} , booktitle={{Sixth References Références Referencias}} , year={2011} } @book{b13, , title={{Route packets,Not wires: On-chip interconnection International Symposium Electronic Design, Test and Application (DELTA)}} , author={{ WJDally } and { BTowles }} , year={2001} } @incollection{b14, , title={{Energy aware design methodologies for networks}} , author={{ NChoudhary } and { MSGaur } and { VLaxmi } and { VSingh }} , booktitle={{Design Automation Conference. Proceedings}} , publisher={IEEE} , year={2010} } @incollection{b15, , title={{SUNMAP: A Tool for Automatic Topology Selection and Generation for NoCs}} , author={{ SMurali } and { GDeMicheli }} , booktitle={{Proceeding of DAC. application specific NoC}} eeding of DAC. application specific NoC , year={2004} , note={IEEE 28th Norchip Conference Finland} } @incollection{b16, , title={{Orion: a power-performance simulator for interconnection}} , author={{ HSWang } and { XZhu } and { LSPeh } and { SMalik }} , booktitle={{proc. International Symposium on Microarchitecture}} International Symposium on Microarchitecture , year={2002} } @incollection{b17, , title={{NIRGAM: a simulator for NoC interconnects routing and application modeling}} , author={{ LJain } and { BMAl-Hashimi } and { MSGaur } and { VLaxmi } and { ANarayanan }} , booktitle={{Design, Automation and Test in Europe Conference}} , year={2007} } @incollection{b18, , title={{Energy-and performance-aware mapping for regular NoC architectures}} , author={{ JHu } and { RMarculescu }} , journal={{IEEE TransactionComputer-Aided Design of Integrated Circuits and Systems}} 24 4 , year={2005} } @incollection{b19, , title={{TGFF: task graphs for free}} , author={{ RPDick } and { DLRhodes } and { WWolf }} , booktitle={{IEEE Computer Society. Proceedings of the 6th international workshop on Hardware/software codesign}} , year={1998} } @book{b20, , title={{}} , author={{ CormenThomas } and { H } and { LeisersonCharles } and { E } and { RivestRonald } and { L } and { SteinClifford }} , year={2009} , publisher={The MIT Press} , note={Introduction to Algorithms third edition} } @book{b21, , title={{_Orion 2.0: a fast and accurate NoCpower and area model for early-stage design space exploration}} , author={{ ABKahng } and { BLi } and { LSPeh } and { KSamadi }} , year={2009} , note={_ in DATE'09} }