@incollection{,
	
					
					
					56BA7A3BC6A3483BBE1AF93D1AD265FC
				,
	author={{SamtaJain} and {VaishaliSodani} and {NaveenChoudhary} and {College of Technology and Engineering, Udaipur}},
	journal={{Global Journal of Computer Science and Technology}},
	journal={{GJCST}}0975-41720975-435010.34257/gjcst,
	address={Cambridge, United States},
	publisher={Global Journals Organisation}16316
}

@incollection{b0,
	
	
		,
	title={{Route packets, Not wires: On-chip interconnection networks}}
		,
	author={{
			WJDally
		} and {
			BTowles
		}}
		
	
	
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	booktitle={{Design Automation Conference, Proceedings}}
				
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	publisher={IEEE}
			,
	year={2001}
			
		
	

}

@incollection{b1,
	
	
		,
	title={{Energy, Throughput and Area Evaluation of Regular and Irregular Network on Chip Architectures}}
		,
	author={{
			SUmamaheswari
		} and {
			PRajapaul
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			J
		}}
		
		
	
	
		,
	journal={{Journal of Distributed and Parallel Systems}}
		
			2
			5
			,
	year={2011}
		
	
	,
	note={IJDPS}

}

@incollection{b2,
	
	
		,
	title={{Floorplanning and Topology Generation for Application-Specific Network-on-Chip}}
		,
	author={{
			YuBei
		} and {
			DongSheqin
		}}
		
	
	
		,
	booktitle={{Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific}}
				
			,
	publisher={IEEE}
			,
	year={2010}
			
		
	

}

@incollection{b3,
	
	
		,
	title={{Performance of data networks with random links}}
		,
	author={{
			HFuks
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			ALawniczak
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			51
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}

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	title={{}}
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	author={{
			YOgras Umit
		} and {
			RMarculescu
		}}
		
		
			,
	year={2005}
		
	

}

@book{b5,
	
	
		,
	title={{Application Specific Network-on-Chip Architecture Customization via Long Range Link Insertion}}
		
	

}

@incollection{b6,
	
	
		,
	title={{It's a Small World After All: NoC Performance Optimization via Long Range Link Insertion}}
		,
	author={{
			YOgras Umit
		} and {
			RMarculescu
		}}
		
	
	
		,
	journal={{IEEE}}
		
			14
			7
			,
	year={2006}
		
	

}

@incollection{b7,
	
	
		,
	title={{Energy and performance-aware mapping for regular NoC architectures}}
		,
	author={{
			JHu
		} and {
			RMarculescu
		}}
		
	
	
		,
	journal={{Computer-Aided Design of Integrated Circuits and Systems}}
		
			24
			
			,
	year={2005}
		
	

}

@book{b8,
	
	
		,
	title={{and South Pacific Design Automation Conference}}
				
			
		
	

}

@incollection{b9,
	
	
		,
	title={{GA based congestion aware topology generation for application specific NoC}}
		,
	author={{
			NChoudhary
		} and {
			MSGaur
		} and {
			VLaxmi
		} and {
			VSingh
		}}
		
		
		
	
	
		,
	booktitle={{Sixth IEEE International Symposium Electronic Design, Test and Application (DELTA)}}
				
			,
	year={2011}
			
		
	

}

@book{b10,
	
	
		,
	title={{}}
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	author={{
			ABKahng
		} and {
			BLi
		} and {
			LSPeh
		} and {
			KSamadi
		}}
		
		
		
		
			,
	year={2009}
		
	

}

@incollection{b11,
	
	
		,
	title={{Orion 2.0: A fast and accurate NoC power and area model for early-stage design space exploration}}
	
	
		,
	booktitle={{Proceedings of the conference on Design, Automation and Test in Europe}}
				the conference on Design, Automation and Test in Europe
		
			
		
	

}

@book{b12,
	
	
		,
	title={{}}
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			RPDick
		} and {
			DLRhodes
		} and {
			WWolf
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	year={1998}
		
	

}

@incollection{b13,
	
	
		,
	title={{TGFF: task graphs for free}}
	
	
		,
	booktitle={{IEEE Computer Society, Proceedings of the 6th international workshop on Hardware/software co-design}}
				
			
		
	

}

@book{b14,
	
	
		,
	title={{Introduction to Algorithms}}
		,
	author={{
			HThomas
		} and {
			CharlesECormen
		} and {
			RonaldLLeiserson
		} and {
			CliffordRivest
		} and {
			Stein
		}}
		
		
		
		
		
			,
	year={2009}
			,
	publisher={The MIT Press}
			,
	address={Cambridge, Massachusetts London, England}
		
	
	,
	note={3 rd edition}

}

@incollection{b15,
	
	
		,
	title={{Energy consumption in networks on chip: efficiency and scaling}}
		,
	author={{
			BGeorge
		}}
	
	
		,
	booktitle={{IEEE 15 th International Symposium}}
				
			,
	year={2009}
			
		
	

}

@book{b16,
	
	
		,
	title={{Evaluation of Pseudo Adaptive XY Routing Using an Object Oriented Model for NOC}}
		,
	author={{
			MDehyadgari
		} and {
			MNickray
		} and {
			AKusha
		} and {
			ZNavabi
		}}
		
		
		
		
			,
	year={2005}
		
	

}

@book{b17,
	
	
		,
	title={{Interconnection Networks: An Engineering Approach}}
		,
	author={{
			JDuato
		} and {
			SYalamanchili
		} and {
			LNi
		}}
		
		
		
			,
	year={2003}
			,
	publisher={Morgan Kaufmann Publishers}
			,
	address={San Francisco}
		
	

}

@book{b18,
	
	
		,
	title={{Performance evaluation of different routing algorithm in network on chip master dissertation National Institute of Technology Rourkella}}
		,
	author={{
			JKSingh
		}}
		
			,
	address={Odesha}
		
	

}

@book{b19,
	
	
		,
	author={{
			GAdamu
		} and {
			PChejara
		} and {
			AGarko
		} and {
			B
		}}
		
		
		
		,
	title={{Review of deterministic routing algorithm for network-onchip. International conference on science, technology and management}}
				
			,
	year={2015}
		
	

}

@incollection{b20,
	
	
		,
	title={{Deadlock Free Routing Algorithms for Mesh Topology NoC Systems with Regions}}
		,
	author={{
			RHolsmark
		} and {
			MPalesi
		} and {
			SKumar
		}}
		
		
	
	
		,
	booktitle={{Digital System Design: Architectures, Methods and Tools, 9th EUROMICRO Conference}}
				Dubrovnik
		
			,
	year={2006}
			
		
	

}

@incollection{b21,
	
	
		,
	title={{Network-on-Chip: A New SoC Communication Infrastructure Paradigm}}
		,
	author={{
			NChoudhary
		}}
	
	
		,
	journal={{International Journal of Soft Computing and Engineering (IJSCE)}}
		2231-2307
		
			1
			
			,
	year={2012}
		
	

}

@incollection{b22,
	
	
		,
	title={{NC-G-SIM: A Parameterized Generic Simulator for 2D-Mesh, 3D Mesh & Irregular On-chip Networks with Table-based Routing}}
		,
	author={{
			KVyas
		} and {
			NChoudhary
		} and {
			DSingh
		}}
		
		
	
	
		,
	journal={{Global Journal of Computer Science and Technology (GJCST-E) on Network, Web & Security}}
		
			13
			
			,
	year={2013}
		
	

}

@incollection{b23,
	
	
		,
	title={{Energy Efficient Mapping in 3D Mesh Communication Architecture for NoC}}
		,
	author={{
			PWadhwani
		} and {
			NChaudhary
		} and {
			DSingh
		}}
		
		
	
	
		,
	journal={{Global Journal of Computer Science, and Technology (GJCST-E) on Network, Web & Security}}
		
			13
			
			,
	year={2013}
		
	

}

@incollection{b24,
	
	
		,
	title={{Energy-aware mapping for tile-based NoC architectures under performance constraints}}
		,
	author={{
			JHu
		} and {
			RMarculescu
		}}
		
	
	
		,
	booktitle={{Proceedings of the Asia}}
				the Asia
		
			,
	year={2003}
		
	

}