# I. INTRODUCTION

his paper addresses two amplifier topologies that use bipolar junction transistors (BJTs). In a previous paper a common emitter amplifier was evaluated and it was determined that the value of the bypass capacitor played a significant role in the voltage gain and other parameters due to the low emitter resistance of the transistor [1]. It was also established through simulations and analysis that the coupling capacitors did not affect the results of required amplifier parameters to any great extent. Here we address the common collector amplifier, otherwise known as the emitter follower, and the common base amplifier. Both configurations employ coupling capacitors, so for this work they will be considered as ideal. The output impedance of the source and the input impedance of the load can be factored in after developing the initial model.

For either amplifier design, and for a given transistor, the designer works through a set of calculations to determine the biasing resistor values, then often has to modify those values to achieve the proper voltage gain (A v ), input impedance (R in ), output impedance (R o ), and voltage difference between the collector and emitter (V ce ). This latter parameter can affect whether the amplifier enters saturation or cutoff. For the common collector amplifier the voltage gain is just under unity, as shown later.

The goal of this work is primarily intended for engineers, but others may want to evaluate specific amplifier designs based on the results illustrated in this paper. For any specific amplifier design, the neural network should be able to provide reasonably close biasing resistor values, provided that the parameters input by the user are within appropriate limits. It is hoped that with the addition of these two amplifier designs to the common emitter circuit shown in a previous paper, the user will be able to approximate the appropriate resistor values in a streamlined manner.

This paper is organized as follows. First, the design procedure for the dc equivalent common collector circuit is introduced along with some of its defining equations. Next, the expressions needed to solve for the ac equivalent circuit are developed. This is followed by a brief discussion of the neural network architecture and results. The next section addresses the common base ac equivalent circuit and the corresponding results. Finally, some conclusions will be discussed and some thoughts for further work. When analyzing both of these amplifiers there are the dc bias values and the ac signals to contend with, but one must look at each of them separately in order to compute the proper operating points.


# II. THE COMMON COLLECTOR AMPLIFIER

The common collector circuit is one of the basic configurations introduced when studying the BJT [2]- [4]. It is considered as a voltage buffer providing a high input impedance and a low output impedance, which is useful for impedance matching with other circuits. As stated above, the voltage gain of this circuit is approximately equal to one.An example of the common collector amplifier is shown in Fig. 1 where the 2N3904 NPN transistor is used with ?=160. The ac input is Vi while the output is taken from the emitter terminal.For this amplifier the neural network is designed to accept three input parameters: input resistance (R in ), output resistance (R out ), and the voltage across the collectoremitter junction (V ce ). The objective of the network is to provide the biasing resistors R b1 , R b2 , and R e , needed to achieve the desired results.

Initially, the dc circuit is analyzed with all capacitors considered as open circuits in order to find the currents and voltages from the power supply and biasing resistors. The coupling capacitors isolate the dc component where its circuit equivalent is shown in Fig. 2.As in the previous work, the dc biasing voltage was 15 volts for both circuits described in this paper. All input signals were set to 3 kHz sinusoids.  To determine the dc biasing values, the base resistors and source are replaced with their Thevenin equivalents as shown here.
?? ??? = ?? ???? ? ?? ?? 2 ?? ?? 1 +?? ?? 2 ? and ?? ?? = ?? ??1 ||?? ??2(1)
This allows a single loop circuit to be analyzed as in (2) where the base current, B I , can be determined.

??? ??? + ?? ?? ?? ?? + 0.7 + (?? + 1)?? ?? ?? ?? = 0

After the dc bias values have been found those sources are set to zero and only the ac components are considered. Recall that the dc voltage sources become short circuits to ground when set to zero. The ac equivalent of the transistor circuit is shown in Fig. 3 using the hybrid -? model [4]. The ac values of input and output resistance, along with V ce are computed from the dc bias currents. Most of the ac equivalent expressions can be found in texts on microelectronics so they are only summarized here. As shown below, the total collector current C i is ascertained where be v is the ac base to emitter voltage and T V is the thermal voltage, usually approximated at 25 mV yielding:
?? ?? ? ?? ?? ?1 + ?? ???? ?? ?? ? = ?? ?? + ? ?? ?? ?? ?? ? ?? ????(3)
From now on the ac component is of interest and the DC sources are shut down. By looking at the far right term from equation 3 it can be seen that the ac equivalent is:
be T C c v V I i ? ? ? ? ? ? ? ? = (4)
The component in parenthesis is referred to as the transconductance, with symbol m g so:
T C m V I g / =(5)
therefore:
be m c v g i =(6)
The ac input resistance of the transistor itself is given as
( ) m be m be b be g v g v i v r ? ? ? = = =(7)
Or alternatively
( ) ( ) B T T B T C I V V I V I r = = = ? ? ? ? (8)
Note from Fig. 3 that:
?? ?? = (?? + 1)?? ??(9)
So the output voltage can be computed as:
?? ?? = ?? ?? (?? + 1)(?? ?? ||?? ?? )(10)
where ?? ?? is the resistance seen looking into the collector and is often calculated as 100/?? ?? . By writing a KVL equation around the baseemitter loop we arrive at:
?? ???? = ?? ?? [?? ?? + (?? + 1)(?? ?? ||?? ?? )](11)
The small signal input impedance results from dividing the expression above by the base current yielding:
?? ???? = ?? ???? ?? ?? = ?? ?? + (?? + 1)(?? ?? ||?? ?? )(12)
Taking into account the two biasing resistors ?? ??1 and?? ??2 which are in parallel with?? ???? the overall input impedance of the amplifier is:
?? ???? = ?? ??1 ||?? ??2 ||?? ????(13)
As one might expect, the input impedance of this amplifier is significant, resulting in a very low loading effect on stages that might precede it. By combining equations ( 10) and ( 12) the voltage gain is determined to be:
?? ?? = (??+1)(?? ?? ||?? ?? ) ?? ?? +(?? +1)(?? ?? ||?? ?? ) ? 1 (14)
Computing the output impedance,?? ?? , is somewhat involved, so only the result will be presented here where it can be seen as being very low due to the ?? + 1 factor. It can be on the order of tens of ohms.
?? ?? = ?? ?? ?? +1 ||?? ?? ||?? ??(15)

# III. NEURAL NETWORKS

Neural networks are most commonly considered as pattern recognition systems. This author has used them to develop a method of impedance matching using feed-forward neural networks [5] and also in the design of common emitter amplifiers [1]. They are non-linear systems and are often employed to separate input patterns by setting up a set of hyperplanes in ndimensional space [6] - [8].

In order to train the neural networks in this project a set of "for" loops was created in MATLAB ? for the three biasing resistors. For all of the tests, the resistor values ranged as shown in table I. Since the voltage gain is near unity for the common collector amplifier it was not addressed in this work. The values of R in , R o , and V ce were calculated for all of the resistor combinations. Once this was completed a neural network was trained using the new input values of the three parameters above to compute the three biasing resistor values. In developing the network, the inputs and outputs were normalized to ensure convergence. For this circuit there were 7,500 training patterns, limited to realistic output values. For example, V ce was held to the range of 2 volts to 12 volts. The test sets consisted of a larger number of patterns, none of which had been used in training.

The neural network package in MATLAB ? was employed to train the networks, by utilizing the Levenberg-Marquardt algorithm, using one hidden layer of 14 sigmoidal (Tanh) neurons each [9]. As noted in the previous work, a lesser number of nodes yielded unacceptable results, and more nodes or more than one hidden layer did not provide any improvement in performance. The network was trained for 2000 epochs resulting in a mean-squared error (mse) of 2.45x10 -8

. Further training did not seem improve performance. A comparison between the neural network results and those by direct calculation is shown in table II. Fig. 4 shows the architecture of the neural network. This network employs hyperbolic tangent activation functions to map the transistor parameters to the values of the resistors. The number of patterns changes with all of the training and testing scenarios because as the values of the biasing resistors change, the outputs can fall out of the ranges specified earlier. Only those that fall within those ranges are employed in the tests. When using the res istance values illustrated in table I the output parameters have the ranges shown in table III. It is not required that these ranges be followed precisely but it is likely a good practice to stay within them when considering an input set. Year 2018 ( ) D Fig. 4: Architecture of the neural network with 14 hidden nodes. It is important to realize that not all input parameter combinations are feasible. For example, if the base bias resistors are kept to a low value the collector and emitter currents can be greater, resulting in a smaller value of V ce . In this case it would not be appropriate to set a small value of dc input resistance and a large value of V ce , since they can be mutually exclusive. However, by judiciously choosing realistic inputs the results can be close to the desired values. Some comparisons of the neural network out against calculation are shown in table IV. During the testing phase the network was asked to determine the resistor values for three different ac parameters. The input impedances, output impedances, V ce , and the values of the resistors predicted by the network were recorded. The resistor values from the network were then used to calculate those same ac values directly. The results were remarkably good as shown in table IV. The resistor values from the last trial from table IV were used in a P-Spice simulation. The values were
? = k R b 96 . 7 1 , ? = k R b 98 . 9 2 and ? = k R e 07 . 1
. The results are summarized in table V along with the percent errors. 


# IV. THE COMMON BASE AMPLIFIER

The second circuit addressed in this paper is the common base amplifier. The hybrid -? model of the transistor is also used. The DC analysis of this circuit is essentially the same as for the previous one except that it has collector resistor, so it will not be addressed here. The ac equivalent of a common base amplifier is shown in Fig. 5 in which the base is at signal ground. The input is at the emitter and the output is at the collector. A summary of the voltage gain, current gain, input impedance, and output impedance is presented here. As in the other configurations, the output impedance of the signal source is not included, since that parameter would be unknown for the individual amplifiers.
?? ?? = ð??"ð??" ?? ?? ??(16)
The current gain can be approximated by:
?? ?? ? ?? ?? +1 = ?? < 1(17)
The input resistance of the amplifier ?? ???? is quite low where the input signal sees the emitter resistance ?? ?? :
?? ???? = ?? ?? ?? +1 = ?? ??(18)
The output resistance ?? ?? is approximated as:
?? ?? = ?? ?? ||?? ??(19)
One may wonder about the significance of this circuit but since the output impedance looking back into the collector is very large. However due to this characteristic it behaves almost like an ideal current source. It is sometimes referred to as a current buffer.  As in the common collector circuit, the values of Rin, Ro, and Vce were calculated for all of the resistor combinations. Again, V ce was held to a range of 2 volts to 12 volts.

Here the network consisted of one hidden layer of 14 sigmoidal neurons. The network was trained for 1904 epochs resulting in a msetargetof1.0x10 -8

. A comparison of the results obtained from the network against the true values of resistance are revealed in table VII for several different test sets. The number of patterns changes with all of the training and testing scenarios because as the values of the biasing resistors change, the can fall out of the ranges specified earlier. Only those that fall within those ranges were employed in the tests. When using the resistance values illustrated in table VI the output parameters have the ranges shown in table VIII. It is not required that these ranges be followed precisely but it is likely a good practice to stay within them when considering an input For the common base amplifier the voltage gain was the primary focus, however the output impedance and V ce were also determined. The input impedance was more problematic. For this amplifier, several combinations of resistor values yielded the same input impedance values. Therefore, when training from the input impedance to find the bias resistors, the network experienced multiple targets meaning that the network could not converge. Several experiments that included input impedance were conducted, but the results were unsuccessful. For this amplifier the input impedance is very low, and from the bias resistors contained in table VI, Rin only ranged from about 4.7? to 10.6?. In this case it might be prudent to approximate the value as 7.5? for most applications. The results between the neural network and those by direct calculation are shown in table IX. The resistor values from the last trial from table IX were used in a P-Spice simulation with ?? ??1 = 9 ???,?? ??2 = 4.5???, ?? ?? = 1.1???, and ?? ?? = 600?. The results are summarized in table X along with the percent errors. 


# V. CONCLUSIONS AND FURTHER WORK

It was remarkable how well the network results compared against those from direct calculation and from P-Spice. Several experiments were conducted more than once, and the output values checked frequently, to be certain there were no errors.

This has been an interesting research project as a follow-up to previous work. Here, two classical BJT amplifiers have been analyzed, then synthesized by a set of neural networks. In both cases the capacitors did not play a significant role and were considered to be ideal. This neural network paradigm should be useful to engineers and faculty members when looking for solutions to various designs. The research described in this paper can help to resolve and verify transistor solutions for both configurations and can illustrate the efficacy of neural networks as a tool for this branch of amplifier design. It is the intension of this author to look into other, more complex amplifier designs, such as the cascode circuit which is a multistage system, consisting of a common emitter amplifier driving a common base amplifier.
1![Fig. 1: Common collector amplifier circuit.](image-2.png "Fig. 1 :")
2![Fig. 2: The dc equivalent circuit of a common collector amplifier.](image-3.png "Fig. 2 :")
3![Fig. 3: The ac equivalent circuit of the common collector amplifier.](image-4.png "Fig. 3 :")
5![Fig. 5: This is the ac equivalent circuit of the common base amplifier.](image-5.png "Fig. 5 :")
1ResistorStart value Step Value Stop ValueRb14 k?250 ?10 k?Rb24 k?250 ?10 k?Re400 ?100 ?1.5 k?
2Data typeNumber of patternsUpper base resistor Rb1(mse)Lower base resistor Rb2(mse)Emitter resistor Re(mse)Training set75000.7846.000.0131Test Set #183161.487.800.0225Test Set #2104401.397.200.020Test Set #3111601.236.710.018Test Set #4137281.417.240.020The training set was included for comparative purposes.
3ParameterMinimum valueMaximum ValueRin1.94 k ?4.90 k?Ro1.4 ?10.5?Vce5.1 V11.6 v
4Rin (?)%error Ro (?) % error Vce%error24020.0832.6340.0766.670.07531010.0323.3860.003 5.6950.00443100.0013.5830.002 7.5470.013
5Paramet ersNeural Network P-Spice % differenceRin4310?4274?-0.835Ro3.583?3.546?-1.033Vce7.547V7.549V0.027
R b1R b2R eHiddenLayerR inR oV ceYear 201828)D(ViReRc
6Rb14 k?250 ?10 k?Rb24 k?250 ?10 k?Rc1 k?100 ?3 k?Re400 ?100 ?1.5 k?
7Data typeNumber of patternsUpper base resistor Rb1(mse)Lower base resistor Rb2(mse)Collector resistor Rc(mse)Emitter resistor Re(mse)Training set56760.7041.240.0310.038Test Set #162420.6561.200.0300.035Test Set #281080.6031.100.0270.031Test Set #391350.5601.100.2810.030Test Set #4109380..6271.110.0290.323The training set was included for comparative purposes.
8ParameterMinimum valueMaximum ValueRo950 ?2.092 k?Av93.9 V/V210 V/VVce2.02 V9.11 V
9Ro (k?)% errorAv V/V% errorVce% error1.3050.192062.12 4.17 0.841.748-0.342021.03 5.78 -0.761.0450.0122072.51 3.24V 0.24
10Parameters Neural Network P-Spice% differenceRo1.045k?1.05k?0.478Av207V/V211V/V1.93Vce3.24V3.27V0.926
			© 2018 Global Journals
		
		
			

				


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