@incollection{,
	
					
					
					64423A0F4737500552A99C914F688426
				,
	author={{V. KumaraSwamy} and {V. KumaraSwamy} and {Dr. PrabhuBenakop} and {Auroras Engineering College}},
	journal={{Global Journal of Computer Science and Technology}},
	journal={{GJCST}}0975-41720975-435010.34257/gjcst,
	address={Cambridge, United States},
	publisher={Global Journals Organisation}131715
}

@incollection{b0,
	
	
		,
	title={{A Modified Approach for Symmetric Key Cryptography Based on Blowfish Algorithm}}
		,
	author={{
			MonikaAgrawal
		} and {
			PradeepMishra
		}}
		
	
	
		,
	journal={{International Journal of Engineering and Advanced Technology (IJEAT)}}
		2249 -8958
		
			1
			,
	year={August 2012}
		
	

}

@incollection{b1,
	
	
		,
	title={{Study and Performance Analysis of Cryptography Algorithms}}
		,
	author={{
			SPavithra
		} and {
			.EMrs
		} and {
			Ramadevi
		}}
		
		
	
	
		,
	journal={{International Journal of Advanced Research in Computer Engineering & Technology}}
		
			1
			5
			,
	year={July 2012}
		
	

}

@incollection{b2,
	
	
		,
	title={{An Implementation of High Security and High Throughput Triple Blowfish Cryptography Algorithm}}
		,
	author={{
			WWalied
		} and {
			AliESouror
		} and {
			RasheedTaki El-Deen
		} and {
			AdelMokhtar -Awady Ahmed
		} and {
			Zaghlulmahmoud
		}}
		
		
		
		
	
	
		,
	journal={{International Journal of Research and Reviews in Signal Acquisition and Processing (IJRRSAP)}}
		2046-617X
		
			2
			1
			,
	year={March 2012}
		
	

}

@book{b3,
	
	
		,
	title={{On Modulo 2n +1 Adder Design}}
		,
	author={{
			THaridimos
		} and {
			GiorgosVergos
		} and {
			Dimitrakopoulos
		}}
		
		
		
			,
	publisher={IEEE}
		
	

}

@incollection{b4,
	
	
		,
	title={{}}
	
	
		,
	journal={{TRANSACTIONS ON COMPUTERS}}
		
			61
			2
			,
	year={FEBRUARY 2012}
		
	

}

@incollection{b5,
	
	
		,
	title={{Critical Path Based Hardware Acceleration for Cryptosystems}}
		,
	author={{
			ChenLiu
		} and {
			RolandoDuarte
		} and {
			OmarGranados
		} and {
			JieTang
		} and {
			ShaoshanLiu
		} and {
			JeanAndrian
		}}
		
		
		
		
		
	
	
		,
	journal={{Journal of Information Processing Systems}}
		
			8
			1
			
			,
	year={2012}
		
	
	,
	note={JIPS)}

}

@book{b6,
	
	
		,
	title={{}}
		,
	author={{
			GurjeevanSingh
		} and {
			AshwaniKumar Singla
		}}
		
		
	

}

@book{b7,
	
	
		,
	title={{Through Put Analysis of Various Encryption Algorithms}}
		,
	author={{
			KSSandha
		}}
		
			,
	year={September 2011}
			2
			e3
		
	
	,
	note={IJCST}

}

@incollection{b8,
	
	
		,
	title={{Implementation of digital design flow for DPA secure WDDL crypto processor using blowfish algorithm}}
		,
	author={{
			VKumaraSwamy
		} and {
			GPrabhu
		} and {
			BBenakop
		} and {
			Sandeep
		}}
		
		
		
	
	
		,
	booktitle={{The Libyan Arab International Conference on Electrical and Electronic Engineering (LAICEEE-2010)}}
				Tripoli, Libya
		
			,
	year={October 23-26, 2010}
			
		
	

}

@incollection{b9,
	
	
		,
	title={{Design and Implementation of DPA Resistant Crypto-Processor using Blowfish Algorithm}}
		,
	author={{
			VKumaraSwamy
		} and {
			DrPrabhu
		} and {
			GBenakop
		} and {
			PSandeep
		}}
		
		
		
	
	
		,
	booktitle={{International Conference on Advanced Communication and Informatics (ICACI-2009)}}
				TPGIT, Vellore, Tamilnadu, India
		
			,
	year={January 11,12, &13th, 2009}
			
		
	

}

@incollection{b10,
	
	
		,
	title={{Improved Modulo 2n +1 Adder Design}}
		,
	author={{
			SomayehTimarchi
		} and {
			KeivanNavi
		}}
		
	
	
		,
	journal={{International Journal of Computer and Information Engineering}}
		
			2
			,
	year={7 2008}
		
	

}

@incollection{b11,
	
	
		,
	title={{A Digital Design Flow for Secure Integrated Circuits}}
		,
	author={{
			KrisTiri
		} and {
			IeeeMember
		} and {
			IngridVerbauwhede
		} and {
			SeniorMember
		}}
		
		
		
	
	
		,
	journal={{IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems}}
		
			25
			7
			,
	year={July 2006}
			,
	publisher={IEEE}
		
	

}

@incollection{b12,
	
	
		,
	title={{A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation}}
		,
	author={{
			KTiri
		} and {
			IVerbauwhede
		}}
		
	
	
		,
	booktitle={{Proc. Design, Automation and Test Eur. Conf. (DATE)}}
				Design, Automation and Test Eur. Conf. (DATE)Paris, France
		
			,
	year={2004}
			
		
	

}