@incollection{, BF3EA15121E780709559CE6B54E19485 , author={{Dr. B. A.Weyori} and {P. N.Amponsah} and {P. K.Yeboah} and {Catholic University of Ghana, Fiapre}}, journal={{Global Journal of Computer Science and Technology}}, journal={{GJCST}}0975-41720975-435010.34257/gjcst, address={Cambridge, United States}, publisher={Global Journals Organisation}1210713 } @book{b0, , title={{A Secure image coding scheme using Residue Number System}} , author={{ AAmmar } and { AKabbany } and { MYoussef } and { AEmam }} , year={March 2001} , address={Egypt} , note={in proceedings of the 18 th National Radio science conference} } @book{b1, , author={{ WWang } and { MN SSwamy } and { MOAhmad }} , title={{th IEEE international workshop on System-on-chip for Realtime Application}} , year={July 2004} , note={RNS Application for Digital Image Processing} } @book{b2, , author={{ AGbolagade } and { SDCotofana }} , title={{A residue to Binary Converter for the {2n+2,2n+1,2n} Moduli Set, Asilomar Conference on Signals, Systems, and Computers}} California, USA , year={October 2008} } @incollection{b3, , title={{Adder based Residue to Binary Numbers Converters for (2 n -1, 2 n , 2 n + 1)}} , author={{ YukeWang } and { XiayuSong } and { MostaphaAboulhamid } and { HongShem }} , journal={{IEEE Trans. On Signal Processing}} 5 7 , year={July, 2002} } @incollection{b4, , title={{A study residue-to-binary converter for three moduli RNS and a scheme of its VLSI implementation}} , author={{ WeiWang } and { MN SSwamy } and { MOAhmad } and { YukeWang }} , journal={{IEEE Trans. On circuits and systems I: Fundamental Theory and App}} 50 2 , year={Feb. 2003} } @book{b5, , title={{Residue arithmetic and its application to computer technology}} , author={{ NSzabo } and { RTanaka }} , year={1967} , publisher={McGraw-Hill} , address={New York} , note={Year 6} } @book{b6, , author={{ CRafeal } and { RichardEGonzalez } and { Woods }} , title={{Digital image processing}} , publisher={Prentice-Hall, Inc. New Jersey, U.S.A} , year={2002} , note={Second edition} } @incollection{b7, , title={{MRC Technique for RNS to Decimal Conversion Using the Moduli Set {2n+2,2n+1,2n}}} , author={{ AGbolagade } and { SDCotofana }} , booktitle={{Proceedings of the 16th Annual Workshop on Circuits, Systems and Signal Processing}} the 16th Annual Workshop on Circuits, Systems and Signal ProcessingVeldhoven, The Netherlands , year={November 2008} } @incollection{b8, , title={{Residue Number System Operands to Decimal Conversion for 3-Moduli Sets}} , author={{ AGbolagade } and { SDCotofana }} , booktitle={{Proceedings of 51st IEEE Midwest Symposium on Circuits and Systems (MWSCAS 08)}} 51st IEEE Midwest Symposium on Circuits and Systems (MWSCAS 08)Knoxville, USA , year={August 2008} } @book{b9, , author={{ BParhami }} , title={{Computer Architecture: Algorithms and Hardware Designs}} , publisher={Oxford University Press} , year={2000} }