Abstract

In this paper the current mirror presented, having low voltage and mixed mode structure has been proposed. The performance of self cascade MOSFET current mirror is optimized with high output impedance and can operate at 1 V or below. Simulation results conform to Analog Mentor tools having Design Architect for schematics and Eldonet for SPICE simulation, with input reference current of 20 μA. This review paper presents a comparative performance study of self cascode current mirror with other current mirrors.

How to Cite
PANT, SHWETA KHURANA, Vivek. Optimal high performance Self Cascode CMOS Current Mirror. Global Journal of Computer Science and Technology, [S.l.], sep. 2011. ISSN 0975-4172. Available at: <https://computerresearch.org/index.php/computer/article/view/763>. Date accessed: 18 jan. 2021.