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\def\makelabel##1{\upshape ##1}}% } {\end{list}\end{raggedright}} \newenvironment{specHead}[2]% {\vspace{20pt}\hrule\vspace{10pt}% \phantomsection\label{#1}\markright{#2}% \pdfbookmark[2]{#2}{#1}% \hspace{-0.75in}{\bfseries\fontsize{16pt}{18pt}\selectfont#2}% }{} \def\TheFullDate{2011-09-20 (revised: 20 September 2011)} \def\TheID{\makeatother } \def\TheDate{2011-09-20} \title{FAXY: Fault Aware Routing Algorithm Based On XY Algorithm for Network on Chip} \author{}\makeatletter \makeatletter \newcommand*{\cleartoleftpage}{% \clearpage \if@twoside \ifodd\c@page \hbox{}\newpage \if@twocolumn \hbox{}\newpage \fi \fi \fi } \makeatother \makeatletter \thispagestyle{empty} \markright{\@title}\markboth{\@title}{\@author} \renewcommand\small{\@setfontsize\small{9pt}{11pt}\abovedisplayskip 8.5\p@ plus3\p@ minus4\p@ \belowdisplayskip \abovedisplayskip \abovedisplayshortskip \z@ plus2\p@ \belowdisplayshortskip 4\p@ plus2\p@ minus2\p@ \def\@listi{\leftmargin\leftmargini \topsep 2\p@ plus1\p@ minus1\p@ \parsep 2\p@ plus\p@ minus\p@ \itemsep 1pt} } \makeatother \fvset{frame=single,numberblanklines=false,xleftmargin=5mm,xrightmargin=5mm} \fancyhf{} \setlength{\headheight}{14pt} \fancyhead[LE]{\bfseries\leftmark} \fancyhead[RO]{\bfseries\rightmark} \fancyfoot[RO]{} \fancyfoot[CO]{\thepage} \fancyfoot[LO]{\TheID} \fancyfoot[LE]{} \fancyfoot[CE]{\thepage} \fancyfoot[RE]{\TheID} \hypersetup{citebordercolor=0.75 0.75 0.75,linkbordercolor=0.75 0.75 0.75,urlbordercolor=0.75 0.75 0.75,bookmarksnumbered=true} \fancypagestyle{plain}{\fancyhead{}\renewcommand{\headrulewidth}{0pt}} \date{} \usepackage{authblk} \providecommand{\keywords}[1] { \footnotesize \textbf{\textit{Index terms---}} #1 } \usepackage{graphicx,xcolor} \definecolor{GJBlue}{HTML}{273B81} \definecolor{GJLightBlue}{HTML}{0A9DD9} \definecolor{GJMediumGrey}{HTML}{6D6E70} \definecolor{GJLightGrey}{HTML}{929497} \renewenvironment{abstract}{% \setlength{\parindent}{0pt}\raggedright \textcolor{GJMediumGrey}{\rule{\textwidth}{2pt}} \vskip16pt \textcolor{GJBlue}{\large\bfseries\abstractname\space} }{% \vskip8pt \textcolor{GJMediumGrey}{\rule{\textwidth}{2pt}} \vskip16pt } \usepackage[absolute,overlay]{textpos} \makeatother \usepackage{lineno} \linenumbers \begin{document} \author[1]{Amin Mehranzadeh } \affil[1]{ Islamic Azad Uiversity of Dezful Branch, Dezful, Iran} \renewcommand\Authands{ and } \date{\small \em Received: 8 August 2011 Accepted: 7 September 2011 Published: 20 September 2011} \maketitle \begin{abstract} The performance of Network-on-Chip (NoC) largely depends on the underlying routing techniques. In this paper we present and evaluate a Fault aware routing algorithm scheme called FAXY based on XY routing algorithm. The simulation results show the effectiveness of FAXY by comparing it with XY routing schemes under different traffic patterns. Simulation results depict that the proposed routing algorithm is able to route packet even in the case of faulty links or switches in the NoC. Moreover, simulation results demonstrate the advantage of FAXY routing algorithm in terms of average packet latency, packet loss rate compared with XY routing algorithm in the presence of permanent faults. For the proposed algorithm, it can get much less average packet latency (10%) and lead to less than average 15% packet loss rate. \end{abstract} \keywords{network on chip, routing algorithm, fault aware.} \begin{textblock*}{18cm}(1cm,1cm) % {block width} (coords) \textcolor{GJBlue}{\LARGE Global Journals \LaTeX\ JournalKaleidoscope\texttrademark} \end{textblock*} \begin{textblock*}{18cm}(1.4cm,1.5cm) % {block width} (coords) \textcolor{GJBlue}{\footnotesize \\ Artificial Intelligence formulated this projection for compatibility purposes from the original article published at Global Journals. However, this technology is currently in beta. \emph{Therefore, kindly ignore odd layouts, missed formulae, text, tables, or figures.}} \end{textblock*} \let\tabcellsep& \section[{INTRODUCTION}]{INTRODUCTION}\par layered architecture called Network on Chip(NoC) \hyperref[b0]{[1]} has been proposed for global communication in complex SoCs to meet the performance requirements. In NoC each core is connected to switch by a network interface.Cores communication with each other by sending packets via a path consisting of a series of switches and inter switch links. Fig. {\ref 1} shows an abstract view of a NOC in this architecture. As shown, each tile is composed of a resource(R) and a switch or router(S). The router is connected to the four neighboring tiles and its local resource via channels. Each channel consists of two directional point-to-point links between two routers or arouter and a local resource \hyperref[b1]{[2,}\hyperref[b2]{3]}.\par The problem of defining communication protocols for these NoCs is not an easy matter since the resources used in traditional networks are not available on-chip. The communication in NoCs takes place via data packets, which are delivered between the communicating components.\par The paths the packets are routed through the network are determined by the routing algorithm. Communication and performance of the entire system are significantly affected by the routing algorithm \hyperref[b3]{[4]}.The performance of NoC largely depends on the underlying Author ? : Islamic Azad University, Dezful Branch, Dezful, Iran. Email : mehranzadeh@iaud.ac.ir Author ? : Islamic Azad University, Dezful Branch, Dezful, Iran. Email : hoodgar@iaud.ac.ir routing technique, which chooses a path for a packet and decides the routing behavior of the switches. Routing algorithms can be generally classified into two types: deterministic and adaptive. In deterministic routing, the path is completely determined by the source and the destination address. On the other hand, a routing technique is called adaptive if, given a source and a destination address; the path taken by a particular packet depends on dynamic network conditions (e.g. congested links due to traffic variability). One main advantage of using deterministic routing is its simplicity in terms of routers design. Because of the simplified logic, the deterministic routing provides low routing latency. In this paper we present and evaluate a Fault aware routing scheme called FAXY which a packet first traverses along x dimension and then along the y dimension. The proposed routing algorithm is able to route packet even in the case of faulty links or switches in the NoC. Simulation results demonstrate the advantage of FAXY in terms of average packet latency, packet loss rate compared with XY routing algorithm in the presence of permanent faults. FAXY can get much less average packet latency and lead to less than average 15\% packet loss rate. \section[{II.}]{II.} \section[{RELATED WORK}]{RELATED WORK}\par The idea of NoC is derived from large-scale computer networks and distributed computing. NoC should be reasonably simple \hyperref[b5]{[5]}. Several previous works have investigated different routing algorithms that are tolerant to permanent and/or temporary errors. In order to ensure successful message transmission through the network, several copies of the same packet may be sent on the network links \hyperref[b7]{[7]}.Similarly, probabilistic flooding algorithms can be employed to flood packets to the entire network, which will finally reach to the destination \hyperref[b8]{[8]}.These techniques increase network load and may create congestion when the network is heavily loaded. Different deterministic routing algorithms have been proposed to detour the faulty link(s) in the case of permanent faults \hyperref[b9]{[9]}. Recently, a fault tolerant algorithm was proposed to avoid routing on the faulty links \hyperref[b10]{[10]}. In this paper, we present a fault-aware dynamic routing algorithm for NoC applications. Our algorithm has the ability to locate the faulty links to avoid them in order to increase the overall network throughput and prevent packet losses. \section[{III.}]{III.} \section[{PROPOSED ROUTING ALGORITHM}]{PROPOSED ROUTING ALGORITHM}\par In proposed routing algorithm, a new faultaware routing algorithm based on XY routing, namely fault-aware XY (FAXY), is used as a representative of deterministic routing scheme because of its simplicity and wide popularity. Obviously, XY routing is a minimal path routing algorithm and is free of deadlock and live lock \hyperref[b11]{[11]}. As shown in Fig. {\ref 3}, With FAXY routing, a packet first traverses along X dimension and then along the Y dimension. When a packet traverses along the X dimension and a link is masked because permanent fault, its traverses along Y dimension in order to increase the overall network throughput and prevent packet losses. The mask is used in order to increase the overall network throughput and prevent packet losses.Our algorithm incorporates the acknowledgment signal to reroute the packets around faulty links \hyperref[b12]{[12]}. Fig. {\ref 2} : Pseudo code of FA-XY routing algorithm IV. \section[{EXPERIMENTAL RESULTS}]{EXPERIMENTAL RESULTS}\par In order to evaluate the FAXY routing algorithm, we developed a Java based simulator, namely gpNoCsim \hyperref[b13]{[13]}. We simulate several square mesh networks with XY and FAXY routing algorithms. The efficiency of each type of routing is evaluated through latency, throughput and average packet loss percent curves. Each simulation is run for a warm-up period of 10000 cycles.\par Thereafter, performance data are collected after 100,000 packets are sent. The network size during simulation is fixed to be 6* 6 tiles. All of the input ports have a FIFO size of 5 flits. Fig. {\ref 3} shows the network throughput and Fig. {\ref 4} shows switch throughput, respectively. As shown in Fig. {\ref 3} and Fig. {\ref 4}, FAXY routing performs better than XY routing algorithm under different fault percent schemes. The fault percent is the number of faulty switches of network that has one link with permanent fault. The packet injection rate (i.e., the number of packets injected to the network per cycle) is fixed to 150 (packets/cycle). As in previous work \hyperref[b2]{[3,}\hyperref[b6]{6]}, the performance of the routing scheme is evaluated through latencythroughput curves. For a given packet injection rate, a simulation is conducted to evaluate the average packet latency. It is assumed that the packet latency is the duration from the time when the first flit is created at the source core, to the time when the last flit is delivered to the destination core. For each simulation, the packet latencies are averaged over 50,000 packets. Latencies are not collected for the first 5,000 cycles to allow the network to stabilize. It is assumed that the packets have a fixed length of 5 flits and the buffer size of input channels is 5 flits. As shown in Fig. {\ref 5}, FAXY routing performs better than XY routing algorithm. FAXY routing algorithm is able to achieve a lower packet latency rate than XY for the same traffic pattern and the injection rate (10\%). Fig. {\ref 5} : Average packet latency for XY and FAXY routing algorithms Fig. \hyperref[fig_2]{6}, show the average packet loss rate. As shown in Fig. \hyperref[fig_2]{6}, FAXY can achieve average 15\% less packet loss rate. Similar to other work in the literature, we assume that the packet loss rate is percent of the packet is created and do not received in the destination node. \section[{CONCLUSION}]{CONCLUSION}\par In this paper, we presented a new approach for fault aware routing algorithms on NoC, namely FAXY routing. We investigated the effect of permanent errors, and packet injection rates on the performance of our algorithm.Simulation results demonstrated the advantage of our routing algorithm in terms of packet loss percent and latency compared to XY routing algorithms in the presence of permanent faults. Our algorithm can achieve average 10\% less latency and average 15\% less packet loss rate.\begin{figure}[htbp] \noindent\textbf{20111}\includegraphics[]{image-2.png} \caption{\label{fig_0}A © 2011 Fig. 1 :}\end{figure} \begin{figure}[htbp] \noindent\textbf{34}\includegraphics[]{image-3.png} \caption{\label{fig_1}Fig. 3 :Fig. 4 :}\end{figure} \begin{figure}[htbp] \noindent\textbf{6}\includegraphics[]{image-4.png} \caption{\label{fig_2}Fig. 6 :}\end{figure} \footnote{© 2011 Global Journals Inc. (US)} \footnote{© 2011 Global Journals Inc. (US) Global Journal of Computer Science and Technology Volume XI Issue XVII Version I} \footnote{October © 2011 Global Journals Inc. (US) FAXY: Fault Aware Routing Algorithm Based On XY Algorithm for Network on Chip} \backmatter \begin{bibitemlist}{1} \bibitem[Ali et al. ()]{b10}\label{b10} ‘A fault tolerant mechanism for handling permanent and transient failures in a network on chip’. M Ali , M Welzl , S Hessler . \textit{Proceedings of International Conference on Information Technology, ITNG}, (International Conference on Information Technology, ITNG) 2007. p. . \bibitem[Hosseini et al. ()]{b12}\label{b12} \textit{A Fault-Aware Dynamic Routing Algorithm for on-Chip-Networks}, A Hosseini , T Ragheb , Y Massoud . 2008. IEEE. \bibitem[Ni and Mckinley (1993)]{b11}\label{b11} ‘A survey of wormhole routing techniques in direct networks’. L M Ni , P K Mckinley . \textit{IEEE Int, Conference on Computer} Feb. 1993. 26 p. . \bibitem[Hu and Marculescu ()]{b2}\label{b2} ‘DyAD -Smart routing for networks-on-chip’. J Hu , R Marculescu . \textit{DAC} 2004. p. . \bibitem[Manolache et al. ()]{b7}\label{b7} ‘Fault and energyaware communication mapping with guaranteed latency for applications implemented on noc’. S Manolache , P Eles , Z Peng . \textit{Proceedings of IEEE/ACM Design Automation Conference, DAC}, (IEEE/ACM Design Automation Conference, DAC) 2005. p. . \bibitem[Pirretti et al. ()]{b8}\label{b8} ‘Fault tolerant algorithms for network-on-chip interconnect’. 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