T.Vijayakumar and S. Ramachandran (2014) “Design and FPGA Implementation of High Speed DWT-IDWT Architecture with Pipelined SPIHT Architecture for Image Compression”, Global Journal of Computer Science and Technology, 14(F1), pp. 40–52. Available at: https://computerresearch.org/index.php/computer/article/view/57 (Accessed: 20 May 2024).