T.Vijayakumar, S. Ramachandran. Design and FPGA Implementation of High Speed DWT-IDWT Architecture with Pipelined SPIHT Architecture for Image Compression. GJCST [Internet]. 2014 Jan. 15 [cited 2024 May 20];14(F1):40-52. Available from: https://computerresearch.org/index.php/computer/article/view/57